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AD5930
SPECIFICATIONS
AV
DD
= DV
DD
= 2.3 V to 5.5 V, AGND = DGND = 0 V, T
A
= T
MIN
to T
MAX
, R
SET
= 6.8 k, R
LOAD
= 200 for IOUT and IOUTB,
unless otherwise noted.
Table 1.
Y Grade
1
Parameter
Min
Typ
Max
SIGNAL DAC SPECIFICATIONS
Resolution
10
Update Rate
50
I
OUT
Full-Scale
2
3
4.0
V
OUT
Peak-to-Peak
0.56
V
OUT
Offset
45
V
MIDSCALE
0.325
Output Compliance
0.8
DC Accuracy
Integral Nonlinearity (INL)
±1.5
Differential Nonlinearity (DNL)
±0.75
DDS SPECIFICATIONS
Dynamic Specifications
Signal-to-Noise Ratio
53
60
Total Harmonic Distortion
60
53
Spurious-Free Dynamic Range
(SFDR)
Wideband (0 to Nyquist)
62
52
Narrowband (±200 kHz)
76
73
Clock Feedthrough
50
Wake-Up Time
1.7
OUTPUT BUFFER
V
OUT
Peak-to-Peak
0
DV
DD
Output Rise/Fall Time
2
12
VOLTAGE REFERENCE
Internal Reference
1.15
1.18
1.26
External Reference Range
1.3
REFOUT Input Impedance
1
25
Reference TC
2
90
LOGIC INPUTS
Input Current
0.1
±1
V
INH
, Input High Voltage
1.7
2.0
2.8
V
INL
, Input Low Voltage
0.6
0.7
0.8
C
IN
, Input Capacitance
2
3
LOGIC OUTPUTS
2
V
OH
, Output High Voltage
DV
DD
0.4 V
V
OL
, Output Low Voltage
0.4
Floating-State O/P Capacitance
5
Rev. 0 | Page 4 of 28
Unit
Bits
MSPS
mA
V
mV
V
V
LSB
LSB
dB
dBc
Test Conditions/Comments
From 0 V to the trough of the waveform
Voltage at midscale output
AV
DD
= 2.3 V, internal reference used
3
f
MCLK
= 50 MHz, f
OUT
= f
MCLK
/4096
f
MCLK
= 50 MHz, f
OUT
= f
MCLK
/4096
dBc
dBc
dBc
ms
V
ns
V
V
k
k
ppm/°C
μA
V
V
V
V
V
V
pF
V
V
pF
f
MCLK
= 50 MHz, f
OUT
= f
MCLK
/50
f
MCLK
= 50 MHz, f
OUT
= f
MCLK
/50
Up to 16 MHz out
From standby
Typically, square wave on MSBOUT and SYNCOUT
V
IN
@ REF pin < Internal V
REF
V
IN
@ REF pin > Internal V
REF
DV
DD
= 2.3 V to 2.7 V
DV
DD
= 2.7 V to 3.6 V
DV
DD
= 4.5 V to 5.5 V
DV
DD
= 2.3 V to 2.7 V
DV
DD
= 2.7 V to 3.6 V
DV
DD
= 4.5 V to 5.5 V
I
SINK
= 1 mA
I
SINK
= 1 mA
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